RegViz: Visualize TSM_OVRD1 Bitfield

Freescale Semiconductor /MKW20Z4 /XCVR /TSM_OVRD1

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Interpret as TSM_OVRD1

PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_EN=0, TX_EN_OVRD_EN=0, ADC_Q_ADC_EN_OVRD_EN=0, ADC_I_ADC_EN_OVRD_EN=0, ADC_RST_EN_OVRD_EN=0, QGEN25_EN_OVRD_EN=0, BBF_PDET_EN_OVRD_EN=0, PLL_PHDET_EN_OVRD_EN=0, ADC_DAC2_EN_OVRD_EN=0, ADC_BIAS_EN_OVRD_EN=0, ADC_DAC1_EN_OVRD_EN=0, ADC_CLK_EN_OVRD_EN=0, BBF_I_EN_OVRD_EN=0, PLL_FILTER_CHARGE_EN_OVRD_EN=0, ADC_EN_OVRD_EN=0, BBF_Q_EN_OVRD_EN=0

Description

TSM Override 1

Fields

PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_EN	Override control for PLL_TX_LDV_RIPPLE_MUX_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_TX_LDV_RIPPLE_MUX_EN_OVRD to override the signal “pll_tx_ldv_ripple_mux_en”.
PLL_TX_LDV_RIPPLE_MUX_EN_OVRD	Override value for PLL_TX_LDV_RIPPLE_MUX_EN
PLL_FILTER_CHARGE_EN_OVRD_EN	Override control for PLL_FILTER_CHARGE_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_FILTER_CHARGE_EN_OVRD to override the signal “pll_filter_charge_en”.
PLL_FILTER_CHARGE_EN_OVRD	Override value for PLL_FILTER_CHARGE_EN
PLL_PHDET_EN_OVRD_EN	Override control for PLL_PHDET_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_PHDET_EN_OVRD to override the signal “pll_phdet_en”.
PLL_PHDET_EN_OVRD	Override value for PLL_PHDET_EN
QGEN25_EN_OVRD_EN	Override control for QGEN25_EN 0 (0): Normal operation. 1 (1): Use the state of QGEN25_EN_OVRD to override the signal “qgen25_en”.
QGEN25_EN_OVRD	Override value for QGEN25_EN
TX_EN_OVRD_EN	Override control for TX_EN 0 (0): Normal operation. 1 (1): Use the state of TX_EN_OVRD to override the signal “tx_en”.
TX_EN_OVRD	Override value for TX_EN
ADC_EN_OVRD_EN	Override control for ADC_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_EN_OVRD to override the signal “adc_en”.
ADC_EN_OVRD	Override value for ADC_EN
ADC_BIAS_EN_OVRD_EN	Override control for ADC_BIAS_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_BIAS_EN_OVRD to override the signal “adc_bias_en”.
ADC_BIAS_EN_OVRD	Override value for ADC_BIAS_EN
ADC_CLK_EN_OVRD_EN	Override control for ADC_CLK_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_CLK_EN_OVRD to override the signal “adc_clk_en”.
ADC_CLK_EN_OVRD	Override value for ADC_CLK_EN
ADC_I_ADC_EN_OVRD_EN	Override control for ADC_I_ADC_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_I_ADC_EN_OVRD to override the signal “adc_i_adc_en”.
ADC_I_ADC_EN_OVRD	Override value for ADC_I_ADC_EN
ADC_Q_ADC_EN_OVRD_EN	Override control for ADC_Q_ADC_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_Q_ADC_EN_OVRD to override the signal “adc_q_adc_en”.
ADC_Q_ADC_EN_OVRD	Override value for ADC_Q_ADC_EN
ADC_DAC1_EN_OVRD_EN	Override control for ADC_DAC1_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_DAC1_EN_OVRD to override the signal “adc_dac1_en”.
ADC_DAC1_EN_OVRD	Override value for ADC_DAC1_EN
ADC_DAC2_EN_OVRD_EN	Override control for ADC_DAC2_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_DAC2_EN_OVRD to override the signal “adc_dac2_en”.
ADC_DAC2_EN_OVRD	Override value for ADC_DAC2_EN
ADC_RST_EN_OVRD_EN	Override control for ADC_RST_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_RST_EN_OVRD to override the signal “adc_rst_en”.
ADC_RST_EN_OVRD	Override value for ADC_RST_EN
BBF_I_EN_OVRD_EN	Override control for BBF_I_EN 0 (0): Normal operation. 1 (1): Use the state of BBF_I_EN_OVRD to override the signal “bbf_i_en”.
BBF_I_EN_OVRD	Override value for BBF_I_EN
BBF_Q_EN_OVRD_EN	Override control for BBF_Q_EN 0 (0): Normal operation. 1 (1): Use the state of BBF_Q_EN_OVRD to override the signal “bbf_q_en”.
BBF_Q_EN_OVRD	Override value for BBF_Q_EN
BBF_PDET_EN_OVRD_EN	Override control for BBF_PDET_EN 0 (0): Normal operation. 1 (1): Use the state of BBF_PDET_EN_OVRD to override the signal “bbf_pdet_en”.
BBF_PDET_EN_OVRD	Override value for BBF_PDET_EN

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